Publications

Journal Papers

Energy-Efficient Supervised Learning with a Binary Stochastic Forward-Forward Algorithm R Jaiswal, S Datta, JG Makin IEEE Transactions on Artificial Intelligence, 2025

Autonomous Probabilistic Coprocessing with Petaflops per Second B Sutton, R Faria, LA Ghantasala, R Jaiswal, KY Camsari, S Datta IEEE Access 8, 157238-157252, 2020  |  Cited by 82

Conference Papers

12.2 P-Circuits: Neither Digital nor Analog MC Li, A Ghosh, R Jaiswal, LA Ghantasala, B Behin-Aein, S Sen, S Datta 2025 IEEE International Solid-State Circuits Conference (ISSCC) 68, 1-3

Building Block For P-Circuits R Jaiswal, MC Li, LA Ghantasala, A Ghosh, B Behin-Aein, J Makin, S Sen, … 2025 IEEE International Electron Devices Meeting (IEDM), 1-4

Fully Automated Regression Tool for Post Silicon Validation A Kansal, R Sinha, R Jaiswal 2017 8th International Conference on Computing, Communication and Networking (ICCCN)  |  Cited by 3

Preprints

Energy Efficient P-Circuits for Generative Neural Networks LA Ghantasala, MC Li, R Jaiswal, A Ghosh, B Behin-Aein, J Makin, S Sen, … arXiv:2507.07763, 2025

Improving Deep Neural Network Performance Through Sampling LA Ghantasala, MC Li, R Jaiswal, B Behin-Aein, J Makin, S Sen, S Datta arXiv:2507.07763, 2025

An Efficient MCMC Approach to Energy Function Optimization in Protein Structure Prediction LA Ghantasala, R Jaiswal, S Datta arXiv:2211.03193, 2022

Benchmarking a Probabilistic Coprocessor J Kaiser, R Jaiswal, B Behin-Aein, S Datta arXiv:2109.14801, 2021  |  Cited by 4

Thesis

Energy-Efficient Training and Inference with P-bit Networks R Jaiswal Purdue University Graduate School, 2025

Patent

Delay-Locked Loop with False-Lock Detection and Recovery Circuit A Gupta, R Jaiswal US Patent 9,553,594, 2017  |  Google Patents

For a complete list and citation metrics, visit my Google Scholar profile.